From 01e1eaa64a6adecfca4cb95b34670e01d9e6ef73 Mon Sep 17 00:00:00 2001 From: Solveig <solvlang@stud.ntnu.no> Date: Tue, 12 Nov 2024 06:29:07 +0100 Subject: [PATCH] fikset msg_key --- controller.vhd | 11 ++++++----- controller_tb.vhd | 2 ++ 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/controller.vhd b/controller.vhd index 6994e70..144f46a 100644 --- a/controller.vhd +++ b/controller.vhd @@ -70,26 +70,27 @@ begin Wr_sig <= '1'; adresse <= "001"; - end if; + else --Hvis RX har mottatt noe data, så skal vi sende videre. Vi skal også skru på led-paeren. - if adresse = "101" and msg_key = '0' then + if adresse = "101" then status <= reading; LED_msg <= '1'; adresse <= "001"; Wr_sig <= '1'; --status <= idle; - else + else Data_bus <= "ZZZZZZZZ"; adresse <= "ZZZ"; Wr_sig <= '0'; Rd_sig <= '0'; --status <= idle; + end if; end if; - --end if; - end if; + end if; + --end if; end process p_clk; end RTL; diff --git a/controller_tb.vhd b/controller_tb.vhd index 5549a48..b326145 100644 --- a/controller_tb.vhd +++ b/controller_tb.vhd @@ -94,6 +94,7 @@ begin begin msg_key <= '1'; wait for CLK_PERIOD; + wait for CLK_PERIOD; msg_key <= '0'; wait for CLK_PERIOD; @@ -106,6 +107,7 @@ begin procedure loopAscii is begin + wait for 100 ns; adresse(2 downto 0) <= "101"; wait until rising_edge(clk); Data_bus <= "01000001"; -- GitLab