From 8313d3793ba1f7ac66762b8085907bd1c49f28cc Mon Sep 17 00:00:00 2001 From: Solveig <solvlang@stud.ntnu.no> Date: Fri, 8 Nov 2024 01:10:06 +0100 Subject: [PATCH] siste endringen --- controller_tb.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/controller_tb.vhd b/controller_tb.vhd index 1b69157..5549a48 100644 --- a/controller_tb.vhd +++ b/controller_tb.vhd @@ -13,7 +13,7 @@ architecture SimulationModel of controller_tb is -- Constant declaration constant CLK_PERIOD : time := 20 ns; -- 50 MHz klokke - -- Component declarasion + -- Component declarasion hihi component controller Port ( clk, rst_n, msg_key: in std_logic; -- GitLab